libera/#neo900/ Wednesday, 2019-07-24

houkimeI would expect sth of the order of 100 Mhz but i really don't know.00:11
houkimeCSI seems quite challenging. I assume that it is D-PHY thing, with one DP for forward stream , one DP for reverse stream, and one more DP for clock.00:22
houkimeAnd the speed on this this is around 1 Gbit/s00:22
houkimeAnd two streams and clock need to be completely independent from each other.00:23
houkimeand _yet_ be synchronized, all 3 of them.00:23
houkimeSo you probably can't really just lay them out as a 6-wire band.00:24
houkimebecause they will crosstalk00:24
houkimeumm, maximum skew between clock and each of the DPs is 1.5mm00:34
houkimekinda tense00:35
houkimeIt is a bit strange that schematics refers to CSI as DSI, CSI while feasibility study says that n900 uses SPI for display. So it is actually a CSI for a front camera.00:37
houkime*as DSI/CSI00:37
houkimemight be a good call to make some simple tests with bb-xm <-> ACX565AKM first00:47
houkimemoreover, on the v2 board these 3 DPs should actually go the other direction from where they need to go in the final design01:00
houkimewhich actually means somehow you need to turn all 3 of them 180 degrees without violating maximum skew of 1.5 mm01:01
houkimebetween clock and each DP01:01
houkimeI prepared an illustrated issue on display CSI bus routing.
houkimeJoerg-Neo900, is this (a bit strange) pinout of differential pairs on bb-xm connector intentional?02:11
houkime(illustrated in the issue)02:11
houkimeWhat were the considerations for such an arrangement?02:12
houkimeIf it is intentional and planned, what are the skews on the bb-xm itself both intra-pair and inter-pair?02:20
houkimeFunny enough v2 prototype docs never even mention front camera02:31
houkimeBut it exists. And CSI stuff is clearly for the front camera.02:32
houkimeAnd it might be a nice idea to fit a hardware killswitch there.02:34

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